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Digital Verification Engineer

2024-07-25

Digital Verification Engineer 面议
  • beijing|| ||
  • 1-3 years
  • Junior college or above
  • Full time
  • 1

Responsibilities

1.Development and Maintenance of the verification platform;

2.Module level and chip level SoC verification;

3.Prepare validation plan and report;

4.Improve verification quality and efficiency;

5.Chip validation, CP, FT process support, etc。

 

Requirements

1.BS or MS degree in EE, CS, telecom, Microelectronics etc.;

2.Proficient in UVM/VMM;

3. Proficient in C, Perl、Python or Makefile;

4.Familiar with VCS, iRUN and other related EDA tools;

5.Good communication skill, team player with responsibility and passion。

Send out Your Resume

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Contact Us

Tel:010-85160285

Email:service@ingchips.com

 

Resume delivery:hr@ingchips.com

Office

Beijing:Room 803, Building #3, Zijin Digital Park, Haidian District

Shanghai:Room 316, Tower A, Juxin Building, Xiangke Road #58

Shenzhen:Room 1009, Shuguang Building, Science Park, Nanshan District

Technical

Developer Website

Github

Zhihu

Copyright:Ingchips Technology Co., Ltd.  苏ICP备2022018764号-2       BY : xinnet

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